Server/DC-MHS: Difference between revisions

From OpenCompute
Jump to navigation Jump to search
No edit summary
No edit summary
 
(45 intermediate revisions by 2 users not shown)
Line 1: Line 1:
[[File:OCP-servers-v1-17a3x.png|right]]
[[File:OCP-Open-compute-DC-MHS-icon-3x.png|right]]


==Welcome==
==Welcome==


Welcome to the OCP DC-MHS Sub-Project.
Welcome to the OCP Data Center – Modular Hardware System (DC-MHS) Sub-Project.


DC-MHS R1 envisions interoperability between key elements of datacenter, edge and enterprise infrastructure by providing consistent interfaces and form factors among modular building blocks.
DC-MHS R1 envisions interoperability between key elements of datacenter, edge and enterprise infrastructure by providing consistent interfaces and form factors among modular building blocks.
Line 9: Line 9:
DC-MHS R1 standardizes a collection of HPM (Host Processor Modules) form-factors and supporting ingredients to allow interoperability of HPMs and platforms.
DC-MHS R1 standardizes a collection of HPM (Host Processor Modules) form-factors and supporting ingredients to allow interoperability of HPMs and platforms.


There are seven workstreams that comprise DC-MHS:
There are five workstreams that comprise DC-MHS:


*M-FLW (FulL Width HPM)
*M-HPM (Host Processor Modules) featuring three specifications:
*M-DNO (DeNsity Optimized HPM)
**M-FLW (FulL Width HPM)
*M-XIO (eXtended I/O Connectivity)
***Specify the requirements of a Full Width Host Processor Module (HPM). This is for use within products designed for minimum 19” rack, also known as compliant with EIA-310-E but can also accommodate larger 21” racks. This form factor enables a full width HPM usage for CPUs, DIMMs, and related features.
**M-DNO (DeNsity Optimized HPM)
***Outline the requirements of a family of partial width, DeNsity Optimized Host Processor Module (HPM) form factors within the OCP Modular 240 hardware system group of specifications (M-DNO for short). This M-DNO specification embodies design considerations for CPU, DIMMs, and other server processor related features commonly used by the industry today but is not limited to only those functions.
**M-ORO (Open Rack Optimized)
***Full Scope of M-ORO specification is still TBD.
*M-XIO/PESTI (eXtended I/O Connectivity/PEripheral SideBand Tunneling Interface)
**Outline the Modular Extensible I/O (M-XIO) source connector hardware strategy.  An M-XIO source connector enables entry and exit points between sources such as Motherboards, Host Processor Modules & RAID Controllers, and peripheral subsystems such as PCIe risers, backplanes, etc. M-XIO includes the connector, high speed and management signal interface details and supported pinouts.  Additionally, the workstream defines Interface (M-PESTI) base requirements for electrical and protocol compatibility between components of a DC-MHS platform. The M-PESTI protocol overloads a common PRSNT# signal with additional capabilities beyond simple presence/absence of a peripheral.
*M-PIC (Platform Infrastructure Connectivity)
*M-PIC (Platform Infrastructure Connectivity)
**Defines and standardizes common elements needed to interface a Host Processor Module (HPM) to the platform/chassis infrastructure elements/subsystems within the DC-MHS 1.0 family of OCP servers. Standardization of the common interfaces and connectors enables hardware compatibility between DC-MHS HPMs and various DC-MHS system components.
*M-CRPS (Common Redundant Power Supply)
*M-CRPS (Common Redundant Power Supply)
*M-PESTI (PEripheral SideBand Tunneling Interface)
**Defines all the requirements for an M-CRPS internal redundant power supply used in Open Compute Project that could be used in different environments like home/office, datacenter, and high-performance computing, hence harmonizing the server power supply requirements used in the industry with the purpose of creating a standard specification that the customers and vendors of Enterprise and Hyperscale can use for their products.
*M-SIF (Shared InFrastructure)
*M-SIF (Shared InFrastructure)
**Improve interoperability related to shared infrastructure enclosures with multiple, serviceable modules.  Modules containing elements (HPMs, DC-SCM, peripherals, etc.) are blind-matable and hot-pluggable into a shared infrastructure enclosure.


Disclaimer: Please do not submit any confidential information to the Project Community. All presentation materials, proposals, meeting minutes and/or supporting documents are published by OCP and are open to the public in accordance with OCP's Bylaws and IP Policy. This can be found on the [http://www.opencompute.org/about/ocp-policies/ OCP Policies] page. If you have any questions please contact OCP.
Disclaimer: Please do not submit any confidential information to the Project Community. All presentation materials, proposals, meeting minutes and/or supporting documents are published by OCP and are open to the public in accordance with OCP's Bylaws and IP Policy. This can be found on the [http://www.opencompute.org/about/ocp-policies/ OCP Policies] page. If you have any questions please contact OCP.
Line 28: Line 37:
*[mailto:shawn.dube@dell.com Shawn Dube] (Dell)
*[mailto:shawn.dube@dell.com Shawn Dube] (Dell)


===Incubation Committee Representative===
===Workstream Leads===
*[mailto:tavallaei@google.com Siamak Tavallaei] (Google)
*M-HPM:  [mailto:brian.d.aspnes@intel.com Brian Aspnes] (Intel) and [mailto:corey.hartman@dell.com Corey Hartman] (Dell)
*M-XIO/PESTI:  [mailto:charlie.ziegler@dell.com Charlie Ziegler] (Dell) and [mailto:javier.lasa@intel.com Javier Lasa] (Intel)
*M-PIC:  [mailto:tim.lambert@dell.com Tim Lambert] (Dell) and [mailto:clifford.h.dubay@intel.com Cliff DuBay] (Intel)
*M-CRPS:  [mailto:aurelio.rodriguez.echevarria@intel.com Aurelio Rodriguez Echevarria] (Intel) and [mailto:jon.lewis@dell.com Jon Lewis] (Dell)
*M-SIF:  [mailto:dirk.blevins@intel.com Dirk Blevins] (Intel) and [mailto:gregory.sellman@amd.com Greg Sellman] (AMD)


===DC-MHS Wiki Administrator===
===DC-MHS Wiki Administrator===
Line 37: Line 50:
==Current Status==
==Current Status==


DC-MHS R1 specs have been approved by the OCP Incubation Committee in November 2022.
DC-MHS R1 v1.0 specs have been approved by the OCP Incubation Committee in November 2022.


DC-MHS workstreams are working the DC-MHS R1.1 specifications. ''Note: M-SIF is a workstream new to DC-MHS. M-SIF is working on R1 specification.''
DC-MHS workstreams are working the DC-MHS R1 v1.1 specifications.


''Note: M-SIF is a workstream new to DC-MHS. M-SIF is working on v1.0 specification.''


===Approved Contributions===


{| class="wikitable" style="width: 100%; margin:auto"
===Latest DC-MHS Specifications===
 
{| class="wikitable" style="width: 100%; margin:auto; vertical-align:top; text-align:left;"
|-
|-
! Workstream !! Spec
! Type !! Description !! Version !! Submit Date !! Contributor !! style="min-width:100px;"| Link || Notes
|-
|-
| M-FLW || [https://www.opencompute.org/documents/m-flw-r1-v1p0-rc5-pdf SPEC, DC-MHS M-FLW]
| Specification || M-PIC Base Specification || 1.01 || 2/3/23 || Clifford DuBay || [https://drive.google.com/file/d/1JTDvOGOuTnFZjFgp2Ae2lebFZZCmnArc/view?usp=share_link Version 1.01]<br>[https://drive.google.com/file/d/1d2LHGnvyiBcQVCc1_lTO6Xo1WWYi_2Ml/view?usp=share_link Change Bar] ||
*Update Figures and Tables, add Errata content, include Hot Plug information.
*Version 1.01 of the Specification with the Change Bar.
|-
|-
| M-DNO || [https://www.opencompute.org/documents/m-dno-r1-v1p0-rc5-pdf SPEC, DC-MHS M-DNO]
| Specification || M-XIO Base Specification || 1.01 RC1 || 1/24/23 || Javier Lasa || [https://drive.google.com/file/d/1NFDrByIIVKE3YpOkHtfXi1FYPeEKxVnQ/view?usp=share_link Link] || Incorporated Errata#1. ECN:Addition of cable construction considerations, incorporated cable considerations (alignment with PCI-SIG internal cable spec), clarification on P3V3_MGMT usage.
|-
|-
| M-XIO || [https://www.opencompute.org/documents/m-xio-r1-v1p0-rc4-pdf SPEC, DC-MHS M-XIO]
| Specification || M-FLW Base Specification || 1.0 RC5 || 9/28/22 || Corey Hartman || [https://www.opencompute.org/documents/m-flw-r1-v1p0-rc5-pdf Link] || Reviewed in Oct meeting. Approved by the IC on 11/4/2022
|-
|-
| M-PIC || [https://www.opencompute.org/documents/m-pic-r1-v1p0-rc7-pdf SPEC, DC-MHS M-PIC]
| Specification || M-DNO Base Specification || 1.0 RC5 || 9/28/22 || Michael Gregoire || [https://www.opencompute.org/documents/m-dno-r1-v1p0-rc5-pdf Link] || Reviewed in Oct meeting. Approved by the IC on 11/4/2022
|-
|-
| M-CRPS || [https://www.opencompute.org/documents/m-crps-r1-v1p0-rc4-pdf SPEC, DC-MHS M-CRPS]
| Specification || M-PESTI Base Specification || 1.0 RC2 || 9/28/22 || Javier Lasa || [https://www.opencompute.org/documents/m-pesti-r1-v1p0-rc2-pdf Link] || Reviewed in Oct meeting. Approved by the IC on 11/4/2022
|-
|-
| M-PESTI || [https://www.opencompute.org/documents/m-pesti-r1-v1p0-rc2-pdf SPEC, DC-MHS M-PESTI]
| Specification || M-CRPS Base Specification || 1.0 RC4 || 9/28/22 || Aurelio Rodriguez Echevarria || [https://www.opencompute.org/documents/m-crps-r1-v1p0-rc4-pdf Link] || Reviewed in Oct meeting. Approved by the IC on 11/4/2022
|}
 
 
===Errata and Supporting Documentation===
 
This section includes Errata, ECNs, CAD, PDF Drawings, and other Collaterals from the DC-MHS Workstreams.
 
{| class="wikitable" style="width: 100%; margin:auto; vertical-align:top; text-align:left;"
|-
! Spec. Impacted !! Name !! Format !! Version !! Submit Date !! Contributor !! Link !! Notes
|-
|-
| M-SIF || Workstream new to DC-MHS in October 2022. Spec is in progress.
| DNO || Updated CAD Files || STP || 1.0 || 2/15/2023 || Dirk Blevins || [https://drive.google.com/file/d/1yJW4OTs5wuUdPUIJTV-pgUTAwSVQbp9x/view?usp=share_link Link] || Updates to earlier CAD file. File name: m-dno-pba-assy-type-4-all-connectors-02-15-2023.stp
|-
| PIC || Current Connector List || Document || 1 || 2/1/2023 || Cliff DuBay || [https://docs.google.com/spreadsheets/d/1Vq_JxzZ43ysxBNHJ928vnzIcshA95GYGocaKmJCBC80/edit?usp=share_link Link] || M-PIC Connector List
|-
| DNO || M-DNO_R1_v1p0 Errata Document || Document || 1 || 1/30/2023 || Michael Gregoire || [https://docs.google.com/document/d/1fV0dh6eJAI3vGrNdZpO7I1BoQqYedrPY/edit?usp=share_link&ouid=107990764505043211297&rtpof=true&sd=true Link] || Corrected dimensioning in Figure 35 of the M-DNO Spec.
|-
| DNO || Updated CAD Files || STP || 1.0 || 120/2023 || Dirk Blevins || [https://drive.google.com/file/d/1p6OvdK_DKyaoFqNEXUJbna-pFThwduJI/view?usp=share_link Link] || Updates to earlier CAD file. File name: m-dno-pba-assy-type-4-std-2nd-ocp-01-20-2023.stp
|-
| DNO || Updated CAD Files || STP || 1.0 || 1/20/2023 || Dirk Blevins || [https://drive.google.com/file/d/1AiPcclp9JK_OED4x3joK-aelcMX8tWtk/view?usp=share_link Link] || Updates to earlier CAD file. File name: m-dno-pba-assy-type-4-e1-conn-01-20-2023.stp
|-
| DNO || Updated CAD Files || STP || 1.0 || 1/20/2023 || Dirk Blevins || [https://drive.google.com/file/d/181tWVatVvLzskbhxZRmrCzmT3G56oUFV/view?usp=share_link Link] || Updates to earlier CAD file. File name: m-dno-pba-assy-type-4-e1s-01-20-2023.stp
|-
| FLW || FLW CAD file 1.02 (Errata update) || STP || 1.02 || 1/4/2023 || Corey Hartman || [https://drive.google.com/file/d/12SaVz9NPKjkzKmu3v0KJ2_wfZ2a66Cu8/view?usp=share_link Link] || Errata update added missing rounds to PCB corners of CAD file, no change to spec.
|-
| FLW || FLW Rev 1.0 PDF Drawings || PDF || 1.01 || 10/12/2022 || Corey Hartman || [https://drive.google.com/file/d/1T7eQECRT3JBtDesC7DebBhbvaZT-S05P/view?usp=share_link Link] || Link to FLW Drawings
|}
|}




===Active Documents===
===Inactive Documents===


OCP Presentation Template - please contact [mailto:michael@opencompute.org Michael Schill] for a copy
This section includes Workstream specification errata and any other working documents.


{| class="wikitable" style="width: 100%; margin:auto"
{| class="wikitable" style="width: 100%; margin:auto; vertical-align:top; text-align:left;"
|-
! Spec Impacted !! Name !! Format !! Version !! Submit Date !! Contributor !! Link !! Notes
|-
|-
! Type !! Description !! Version !! Submit Date !! Contributor !! License !! Notes
| PIC || M-PIC Errata 1 and 2 || PDF || 1.0 || 2/1/2023 || Cliff DuBay || [https://drive.google.com/file/d/13G_x8I4XgwV9m6fb38sI1k9zKxfISlQs/view?usp=share_link Link] || Errata 1:  Update Section 9.1 to Avoid High Current in Partial-Mate Conditions  Errata 2 – Update Section 9.1.7.6 to increase the Power Rating from 1080W to 2000W.
|-
| XIO || Errata || PDF || RC4 || 12/12/22 || Javier Lasa || [https://docs.google.com/document/d/14Wfa_c9E0opKl80u9anJpEldtwV_uTp1/edit?usp=share_link&ouid=116740872580294918048&rtpof=true&sd=true Link] || Update SFF-TA-1016 and SFF-TA-1033 pinouts.
|-
| XIO || M-XIO Specification || PDF || 1.0 RC4 || 9/28/22 || Javier Lasa || [https://www.opencompute.org/documents/m-xio-r1-v1p0-rc4-pdf Link] || Reviewed in Oct meeting. Approved by the IC on 11/4/2022
|-
|-
| &nbsp; || &nbsp; || &nbsp; || &nbsp; || &nbsp; || &nbsp; || &nbsp;
| PIC || M-PIC Specification || PDF || 1.0 RC7 || 9/28/22 || Clifford DuBay || [https://www.opencompute.org/documents/m-pic-r1-v1p0-rc7-pdf Link] || Reviewed in Oct meeting. Approved by the IC on 11/4/2022
|-
|-
| &nbsp; || &nbsp; || &nbsp; || &nbsp; || &nbsp; || &nbsp; || &nbsp;
| FLW || FLW Rev 1.0 CAD || STP || 1.01 || 9/23/22 || Corey Hartman || [https://drive.google.com/file/d/1Lia96jWfOch5CZUXqMOa_5wBYZ-0xUYc/view?usp=share_link Link] || Link to the FLW CAD files
|}
|}


Line 80: Line 127:
==Get Involved==
==Get Involved==
*[mailto:dcmhs@opencompute.org Mailing List]
*[mailto:dcmhs@opencompute.org Mailing List]
*[https://www.opencompute.org/projects/server OCP Calendar]
*[https://www.opencompute.org/projects/server OCP Server Project Calendar]
 
 
==Communication==
*Project communication is done through [https://ocp-all.groups.io/g/OCP-DC-MHS https://ocp-all.groups.io/g/OCP-DC-MHS]
*Post: [mailto:OCP-DC-MHS@OCP-All.groups.io OCP-DC-MHS@OCP-All.groups.io]
*Subscribe: [mailto:OCP-DC-MHS+subscribe@OCP-All.groups.io OCP-DC-MHS+subscribe@OCP-All.groups.io]
*Unsubscribe: [mailto:OCP-DC-MHS+unsubscribe@OCP-All.groups.io OCP-DC-MHS+unsubscribe@OCP-All.groups.io]
*''Please make sure to follow the steps until you receive 1) confirmation email from noreply@Groups.io 2) welcome email from [mailto:OCP-DC-MHS@OCP-All.groups.io OCP-DC-MHS@OCP-All.groups.io]''
*''Please check your junk box and unblock noreply@Groups.io if you have trouble receiving the confirmation email''
*To access the mailing list archives go to [https://ocp-all.groups.io/g/OCP-DC-MHS https://ocp-all.groups.io/g/OCP-DC-MHS]




==Meeting Schedule==
==Meeting Schedule==


For public meetings:
For monthly public meetings:
*Schedule is TBD
*Schedule is the third Wednesday of every month at 0800 PST (starts 3/13/23)
*Each workstream has its own weekly meeting for companies that have signed the DC-MHS R1 CLA.
*[https://www.opencompute.org/projects/dc-mhs OCP DC-MHS Project Calendar]
 
 
==Recordings from Past Monthly Meeting Calls==


Each workstream has its own weekly meeting. Only members in the workstream will receive the meeting invitation:
*TBD
*Related info to be sent to each workstream mailing list.




==Slides from April 2022 OCP Tech Talks==
==Slides from April 2022 OCP Tech Talks==


{| class="wikitable" style="width: 100%; margin:auto"
{| class="wikitable" style="width: 100%; margin:auto; vertical-align:top; text-align:left;"
|-
|-
! Presenters (Company) !! Title !! Slides
! Presenter (Company) !! Title !! Video !! Slides
|-
|-
| Shawn Dube (Dell), Brian Aspnes (Intel) || DC-MHS Rev 1.0: Introduction and Overview (Datacenter - Modular Hardware System) || [https://146a55aca6f00848c565-a7635525d40ac1c70300198708936b4e.ssl.cf1.rackcdn.com/images/e98e04e8ce8f9f0078d2cd7c745b6e98f1238f67.pdf Slides]
| Shawn Dube (Dell)<br>Brian Aspnes (Intel) || DC-MHS Rev 1.0: Introduction and Overview (Datacenter - Modular Hardware System) || [https://www.youtube.com/watch?v=Vy1h5sXVmQA Video] || [https://146a55aca6f00848c565-a7635525d40ac1c70300198708936b4e.ssl.cf1.rackcdn.com/images/e98e04e8ce8f9f0078d2cd7c745b6e98f1238f67.pdf Slides]
|-
|-
| Corey Hartman (Dell), Brian Aspnes (Intel) || DC-MHS: FulL Width HPMs (M-FLW) || [https://146a55aca6f00848c565-a7635525d40ac1c70300198708936b4e.ssl.cf1.rackcdn.com/images/d13d08ff84261b0e615f309507ccedb457cf2180.pdf Slides]
| Corey Hartman (Dell)<br>Brian Aspnes (Intel) || DC-MHS: FulL Width HPMs (M-FLW) || [https://www.youtube.com/watch?v=Vy1h5sXVmQA Video] || [https://146a55aca6f00848c565-a7635525d40ac1c70300198708936b4e.ssl.cf1.rackcdn.com/images/d13d08ff84261b0e615f309507ccedb457cf2180.pdf Slides]
|-
|-
| Mike Gregoire (Dell), Dirk Blevins (Intel) || DC-MHS: DeNsity Optimized HPMs (M-DNO) || [https://146a55aca6f00848c565-a7635525d40ac1c70300198708936b4e.ssl.cf1.rackcdn.com/images/748b3531aaa728a59bdab6372c6d234c7989d894.pdf Slides]
| Mike Gregoire (Dell)<br>Dirk Blevins (Intel) || DC-MHS: DeNsity Optimized HPMs (M-DNO) || [https://www.youtube.com/watch?v=Vy1h5sXVmQA Video] || [https://146a55aca6f00848c565-a7635525d40ac1c70300198708936b4e.ssl.cf1.rackcdn.com/images/748b3531aaa728a59bdab6372c6d234c7989d894.pdf Slides]
|-
|-
| Cliff DuBay (Intel), Tim Lambert (Dell) || DC-MHS: Peripheral Infrastructure Connectivity (M-PIC) || [https://146a55aca6f00848c565-a7635525d40ac1c70300198708936b4e.ssl.cf1.rackcdn.com/images/522e38defb48eed767321515e27f5492c54f4071.pdf Slides]
| Cliff DuBay (Intel)<br>Tim Lambert (Dell) || DC-MHS: Peripheral Infrastructure Connectivity (M-PIC) || [https://www.youtube.com/watch?v=Vy1h5sXVmQA Video] || [https://146a55aca6f00848c565-a7635525d40ac1c70300198708936b4e.ssl.cf1.rackcdn.com/images/522e38defb48eed767321515e27f5492c54f4071.pdf Slides]
|-
|-
| Charlie Ziegler (Dell), Javier Lasa (Intel) || DC-MHS: eXtensible I/O (M-XIO) || [https://146a55aca6f00848c565-a7635525d40ac1c70300198708936b4e.ssl.cf1.rackcdn.com/images/6f2310a616532099b19677b52ba594312cb5059f.pdf Slides]
| Charlie Ziegler (Dell)<br>Javier Lasa (Intel) || DC-MHS: eXtensible I/O (M-XIO) || [https://www.youtube.com/watch?v=Vy1h5sXVmQA Video] || [https://146a55aca6f00848c565-a7635525d40ac1c70300198708936b4e.ssl.cf1.rackcdn.com/images/6f2310a616532099b19677b52ba594312cb5059f.pdf Slides]
|-
|-
| Tim Lambert (Dell), Javier Lasa (Intel) || DC-MHS: PEripheral Sideband Tunneling Interface (M-PESTI) || [https://146a55aca6f00848c565-a7635525d40ac1c70300198708936b4e.ssl.cf1.rackcdn.com/images/19a4b08cbe94c96c55a81a8138841768765d5a32.pdf Slides]
| Tim Lambert (Dell)<br>Javier Lasa (Intel) || DC-MHS: PEripheral Sideband Tunneling Interface (M-PESTI) || [https://www.youtube.com/watch?v=Vy1h5sXVmQA Video] || [https://146a55aca6f00848c565-a7635525d40ac1c70300198708936b4e.ssl.cf1.rackcdn.com/images/19a4b08cbe94c96c55a81a8138841768765d5a32.pdf Slides]
|-
|-
| Aurelio Rodriguez (Intel), Jon Lewis (Dell) || DC-MHS: Common Redundant Power Supply (M-CRPS) || [https://146a55aca6f00848c565-a7635525d40ac1c70300198708936b4e.ssl.cf1.rackcdn.com/images/7dcd4a42fafc61adf22802577208a2404dd1c175.pdf Slides]
| Aurelio Rodriguez (Intel)<br>Jon Lewis (Dell) || DC-MHS: Common Redundant Power Supply (M-CRPS) || [https://www.youtube.com/watch?v=Vy1h5sXVmQA Video] || [https://146a55aca6f00848c565-a7635525d40ac1c70300198708936b4e.ssl.cf1.rackcdn.com/images/7dcd4a42fafc61adf22802577208a2404dd1c175.pdf Slides]
|}
|}


Line 116: Line 177:
==Slides/Recordings from October 2022 OCP Global Summit==
==Slides/Recordings from October 2022 OCP Global Summit==


{| class="wikitable" style="width: 100%; margin:auto"
{| class="wikitable" style="width: 100%; margin:auto; vertical-align:top; text-align:left;"
|-
|-
! Title !! Presenter !! Video !! Slides
! Presenter (Company) !! Title !! Video !! Slides
|-
|-
| PANEL: DC-MHS R1 report-out and timeline || Michael Leung (Google) | Aurelio Rodriguez Echevarria (Intel Corporation) | Corey Hartman (Dell) | Tim Lambert (Dell Inc.) | Eduardo Estrada (Intel Corporation) || [https://www.youtube.com/watch?v=-6gmxZiKvEI Video] || [https://drive.google.com/file/d/1ULofl4GqkfYI6bT73v55ureIPLBTvoNJ/view?usp=sharing Slides]
| Michael Leung (Google)<br>Aurelio Rodriguez Echevarria (Intel)<br>Corey Hartman (Dell)<br>Tim Lambert (Dell)<br>Eduardo Estrada (Intel) || PANEL: DC-MHS R1 report-out and timeline || [https://www.youtube.com/watch?v=-6gmxZiKvEI Video] || [https://drive.google.com/file/d/1ULofl4GqkfYI6bT73v55ureIPLBTvoNJ/view?usp=sharing Slides]
|-
|-
| PANEL: Datacenter Modular Hardware System (DC-MHS) || Siamak Tavallaei (Google) | Brian Aspnes (Intel Corporation) | Shawn Dube (Dell) | Jean-Marie Verdun (HPE) | Dharmesh Jani (Meta) || [https://www.youtube.com/watch?v=HdGQsbUqKow Video] || [https://drive.google.com/file/d/1XiM59aLnK9A8PP7W2gFfG7SQeuPZBlIz/view?usp=sharing Slides]
| Siamak Tavallaei (Google)<br>Brian Aspnes (Intel)<br>Shawn Dube (Dell)<br>Jean-Marie Verdun (HPE)<br>Dharmesh Jani (Meta) || PANEL: Datacenter Modular Hardware System (DC-MHS) || [https://www.youtube.com/watch?v=HdGQsbUqKow Video] || [https://drive.google.com/file/d/1XiM59aLnK9A8PP7W2gFfG7SQeuPZBlIz/view?usp=sharing Slides]
|-
|-
| Practical Usage of DC-MHS M-DNO Concepts || Dirk Blevins (Intel Corporation) | Todd Westhauser (Meta) | Vincent Nguyen (HPE) || [https://www.youtube.com/watch?v=2qLueMd6n4A Video] || [https://drive.google.com/file/d/1PiSaLUQjrqoMdrznDWIMbGqB4xRA_xy_/view?usp=sharing Slides]
| Dirk Blevins (Intel)<br>Todd Westhauser (Meta)<br>Vincent Nguyen (HPE) || Practical Usage of DC-MHS M-DNO Concepts || [https://www.youtube.com/watch?v=2qLueMd6n4A Video] || [https://drive.google.com/file/d/1PiSaLUQjrqoMdrznDWIMbGqB4xRA_xy_/view?usp=sharing Slides]
|-
|-
| Multi-host Modular Systems || Siamak Tavallaei (Google) | Dirk Blevins (Intel Corporation) || [https://www.youtube.com/watch?v=0HHNIni0_H0 Video] || [https://drive.google.com/file/d/1-I4SifOo4J53uBRPTNi_lsiqxIkQwuNy/view?usp=sharing Slides]
| Siamak Tavallaei (Google)<br>Dirk Blevins (Intel) || Multi-host Modular Systems || [https://www.youtube.com/watch?v=0HHNIni0_H0 Video] || [https://drive.google.com/file/d/1-I4SifOo4J53uBRPTNi_lsiqxIkQwuNy/view?usp=sharing Slides]
|}
|}


Line 132: Line 193:
==OCP Marketplace Entries==
==OCP Marketplace Entries==


*TBD
The most recent documents will always be in the OCP Marketplace, Specifications & Design Collateral
*[http://www.opencompute.org/contributions http://www.opencompute.org/contributions]
or the OCP Marketplace, Orderable Products
*[http://www.opencompute.org/products http://www.opencompute.org/products]
Entries below are for ease of use and historical reference. Please use the marketplace links for the most recent documents.
 
{| class="wikitable" style="width: 100%; margin:auto; vertical-align:top; text-align:left;"
|-
! Type !! Description !! Version !! Submit Date !! Contributor !! License !! Notes
|-
| &nbsp; || &nbsp; || &nbsp; || &nbsp; || &nbsp; || &nbsp; || &nbsp;
|}

Latest revision as of 21:26, 28 February 2023

OCP-Open-compute-DC-MHS-icon-3x.png

Welcome[edit]

Welcome to the OCP Data Center – Modular Hardware System (DC-MHS) Sub-Project.

DC-MHS R1 envisions interoperability between key elements of datacenter, edge and enterprise infrastructure by providing consistent interfaces and form factors among modular building blocks.

DC-MHS R1 standardizes a collection of HPM (Host Processor Modules) form-factors and supporting ingredients to allow interoperability of HPMs and platforms.

There are five workstreams that comprise DC-MHS:

  • M-HPM (Host Processor Modules) featuring three specifications:
    • M-FLW (FulL Width HPM)
      • Specify the requirements of a Full Width Host Processor Module (HPM). This is for use within products designed for minimum 19” rack, also known as compliant with EIA-310-E but can also accommodate larger 21” racks. This form factor enables a full width HPM usage for CPUs, DIMMs, and related features.
    • M-DNO (DeNsity Optimized HPM)
      • Outline the requirements of a family of partial width, DeNsity Optimized Host Processor Module (HPM) form factors within the OCP Modular 240 hardware system group of specifications (M-DNO for short). This M-DNO specification embodies design considerations for CPU, DIMMs, and other server processor related features commonly used by the industry today but is not limited to only those functions.
    • M-ORO (Open Rack Optimized)
      • Full Scope of M-ORO specification is still TBD.
  • M-XIO/PESTI (eXtended I/O Connectivity/PEripheral SideBand Tunneling Interface)
    • Outline the Modular Extensible I/O (M-XIO) source connector hardware strategy. An M-XIO source connector enables entry and exit points between sources such as Motherboards, Host Processor Modules & RAID Controllers, and peripheral subsystems such as PCIe risers, backplanes, etc. M-XIO includes the connector, high speed and management signal interface details and supported pinouts. Additionally, the workstream defines Interface (M-PESTI) base requirements for electrical and protocol compatibility between components of a DC-MHS platform. The M-PESTI protocol overloads a common PRSNT# signal with additional capabilities beyond simple presence/absence of a peripheral.
  • M-PIC (Platform Infrastructure Connectivity)
    • Defines and standardizes common elements needed to interface a Host Processor Module (HPM) to the platform/chassis infrastructure elements/subsystems within the DC-MHS 1.0 family of OCP servers. Standardization of the common interfaces and connectors enables hardware compatibility between DC-MHS HPMs and various DC-MHS system components.
  • M-CRPS (Common Redundant Power Supply)
    • Defines all the requirements for an M-CRPS internal redundant power supply used in Open Compute Project that could be used in different environments like home/office, datacenter, and high-performance computing, hence harmonizing the server power supply requirements used in the industry with the purpose of creating a standard specification that the customers and vendors of Enterprise and Hyperscale can use for their products.
  • M-SIF (Shared InFrastructure)
    • Improve interoperability related to shared infrastructure enclosures with multiple, serviceable modules. Modules containing elements (HPMs, DC-SCM, peripherals, etc.) are blind-matable and hot-pluggable into a shared infrastructure enclosure.


Disclaimer: Please do not submit any confidential information to the Project Community. All presentation materials, proposals, meeting minutes and/or supporting documents are published by OCP and are open to the public in accordance with OCP's Bylaws and IP Policy. This can be found on the OCP Policies page. If you have any questions please contact OCP.


Project Leadership[edit]

Sub-Project Leads[edit]

Workstream Leads[edit]

DC-MHS Wiki Administrator[edit]


Current Status[edit]

DC-MHS R1 v1.0 specs have been approved by the OCP Incubation Committee in November 2022.

DC-MHS workstreams are working the DC-MHS R1 v1.1 specifications.

Note: M-SIF is a workstream new to DC-MHS. M-SIF is working on v1.0 specification.


Latest DC-MHS Specifications[edit]

Type Description Version Submit Date Contributor Link Notes
Specification M-PIC Base Specification 1.01 2/3/23 Clifford DuBay Version 1.01
Change Bar
  • Update Figures and Tables, add Errata content, include Hot Plug information.
  • Version 1.01 of the Specification with the Change Bar.
Specification M-XIO Base Specification 1.01 RC1 1/24/23 Javier Lasa Link Incorporated Errata#1. ECN:Addition of cable construction considerations, incorporated cable considerations (alignment with PCI-SIG internal cable spec), clarification on P3V3_MGMT usage.
Specification M-FLW Base Specification 1.0 RC5 9/28/22 Corey Hartman Link Reviewed in Oct meeting. Approved by the IC on 11/4/2022
Specification M-DNO Base Specification 1.0 RC5 9/28/22 Michael Gregoire Link Reviewed in Oct meeting. Approved by the IC on 11/4/2022
Specification M-PESTI Base Specification 1.0 RC2 9/28/22 Javier Lasa Link Reviewed in Oct meeting. Approved by the IC on 11/4/2022
Specification M-CRPS Base Specification 1.0 RC4 9/28/22 Aurelio Rodriguez Echevarria Link Reviewed in Oct meeting. Approved by the IC on 11/4/2022


Errata and Supporting Documentation[edit]

This section includes Errata, ECNs, CAD, PDF Drawings, and other Collaterals from the DC-MHS Workstreams.

Spec. Impacted Name Format Version Submit Date Contributor Link Notes
DNO Updated CAD Files STP 1.0 2/15/2023 Dirk Blevins Link Updates to earlier CAD file. File name: m-dno-pba-assy-type-4-all-connectors-02-15-2023.stp
PIC Current Connector List Document 1 2/1/2023 Cliff DuBay Link M-PIC Connector List
DNO M-DNO_R1_v1p0 Errata Document Document 1 1/30/2023 Michael Gregoire Link Corrected dimensioning in Figure 35 of the M-DNO Spec.
DNO Updated CAD Files STP 1.0 120/2023 Dirk Blevins Link Updates to earlier CAD file. File name: m-dno-pba-assy-type-4-std-2nd-ocp-01-20-2023.stp
DNO Updated CAD Files STP 1.0 1/20/2023 Dirk Blevins Link Updates to earlier CAD file. File name: m-dno-pba-assy-type-4-e1-conn-01-20-2023.stp
DNO Updated CAD Files STP 1.0 1/20/2023 Dirk Blevins Link Updates to earlier CAD file. File name: m-dno-pba-assy-type-4-e1s-01-20-2023.stp
FLW FLW CAD file 1.02 (Errata update) STP 1.02 1/4/2023 Corey Hartman Link Errata update added missing rounds to PCB corners of CAD file, no change to spec.
FLW FLW Rev 1.0 PDF Drawings PDF 1.01 10/12/2022 Corey Hartman Link Link to FLW Drawings


Inactive Documents[edit]

This section includes Workstream specification errata and any other working documents.

Spec Impacted Name Format Version Submit Date Contributor Link Notes
PIC M-PIC Errata 1 and 2 PDF 1.0 2/1/2023 Cliff DuBay Link Errata 1: Update Section 9.1 to Avoid High Current in Partial-Mate Conditions Errata 2 – Update Section 9.1.7.6 to increase the Power Rating from 1080W to 2000W.
XIO Errata PDF RC4 12/12/22 Javier Lasa Link Update SFF-TA-1016 and SFF-TA-1033 pinouts.
XIO M-XIO Specification PDF 1.0 RC4 9/28/22 Javier Lasa Link Reviewed in Oct meeting. Approved by the IC on 11/4/2022
PIC M-PIC Specification PDF 1.0 RC7 9/28/22 Clifford DuBay Link Reviewed in Oct meeting. Approved by the IC on 11/4/2022
FLW FLW Rev 1.0 CAD STP 1.01 9/23/22 Corey Hartman Link Link to the FLW CAD files


Get Involved[edit]


Communication[edit]


Meeting Schedule[edit]

For monthly public meetings:

  • Schedule is the third Wednesday of every month at 0800 PST (starts 3/13/23)
  • Each workstream has its own weekly meeting for companies that have signed the DC-MHS R1 CLA.
  • OCP DC-MHS Project Calendar


Recordings from Past Monthly Meeting Calls[edit]

  • TBD


Slides from April 2022 OCP Tech Talks[edit]

Presenter (Company) Title Video Slides
Shawn Dube (Dell)
Brian Aspnes (Intel)		 DC-MHS Rev 1.0: Introduction and Overview (Datacenter - Modular Hardware System) Video Slides
Corey Hartman (Dell)
Brian Aspnes (Intel)		 DC-MHS: FulL Width HPMs (M-FLW) Video Slides
Mike Gregoire (Dell)
Dirk Blevins (Intel)		 DC-MHS: DeNsity Optimized HPMs (M-DNO) Video Slides
Cliff DuBay (Intel)
Tim Lambert (Dell)		 DC-MHS: Peripheral Infrastructure Connectivity (M-PIC) Video Slides
Charlie Ziegler (Dell)
Javier Lasa (Intel)		 DC-MHS: eXtensible I/O (M-XIO) Video Slides
Tim Lambert (Dell)
Javier Lasa (Intel)		 DC-MHS: PEripheral Sideband Tunneling Interface (M-PESTI) Video Slides
Aurelio Rodriguez (Intel)
Jon Lewis (Dell)		 DC-MHS: Common Redundant Power Supply (M-CRPS) Video Slides


Slides/Recordings from October 2022 OCP Global Summit[edit]

Presenter (Company) Title Video Slides
Michael Leung (Google)
Aurelio Rodriguez Echevarria (Intel)
Corey Hartman (Dell)
Tim Lambert (Dell)
Eduardo Estrada (Intel)		 PANEL: DC-MHS R1 report-out and timeline Video Slides
Siamak Tavallaei (Google)
Brian Aspnes (Intel)
Shawn Dube (Dell)
Jean-Marie Verdun (HPE)
Dharmesh Jani (Meta)		 PANEL: Datacenter Modular Hardware System (DC-MHS) Video Slides
Dirk Blevins (Intel)
Todd Westhauser (Meta)
Vincent Nguyen (HPE)		 Practical Usage of DC-MHS M-DNO Concepts Video Slides
Siamak Tavallaei (Google)
Dirk Blevins (Intel)		 Multi-host Modular Systems Video Slides


OCP Marketplace Entries[edit]

The most recent documents will always be in the OCP Marketplace, Specifications & Design Collateral

or the OCP Marketplace, Orderable Products

Entries below are for ease of use and historical reference. Please use the marketplace links for the most recent documents.

Type Description Version Submit Date Contributor License Notes
             
Retrieved from "https://staging2.opencompute.org/w/index.php?title=Server/DC-MHS&oldid=13311"